PMN49EN Datasheet, PDF (7/12 Pages) NXP Semiconductors – N-channel TrenchMOS logic level FET

NXP Semiconductors
PMN49EN
N-channel TrenchMOS logic level FET
2.5
V_GS(th)
(V)
2
1.5
1
03aa33
max
typ
min
10^-1
I_D
(A)
10^-2
10^-3
10^-4
03aa36
min
typ
max
0.5
10^-5
0
-60
0
60
120
180
T_j (°C)
10^-6
0
1
2
3
V_GS (V)
I_D = 1 mA; V_DS = V_GS
Fig 9. Gate-source threshold voltage as a function of
junction temperature
T_j = 25 °C; V_DS = 5 V
Fig 10. Sub-threshold drain current as a function of
gate-source voltage
10
V_GS
(V)
I_D = 3 A
T_j = 25 °C
7.5
15 V
5
2.5
003aab597
V_DS =19 V
0
0
2.5
5
7.5
10
Q_G (nC)
Fig 11. Gate-source voltage as a function of gate
charge; typical values
V_DS
I_D
V_GS(pl)
V_GS(th)
V_GS
Q_GS1 Q_GS2
Q_GS
Q_GD
Q_G(tot)
003aaa508
Fig 12. Gate charge waveform definitions
PMN49EN_1
Product data sheet
Rev. 01 — 13 April 2007
© NXP B.V. 2007. All rights reserved.
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