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BUK135-50L Datasheet, PDF (7/13 Pages) NXP Semiconductors – Logic level TOPFET
Philips Semiconductors
Logic level TOPFET
SMD version of BUK124-50L
Product Specification
BUK135-50L
a
2
Normalised R DS(ON) = f(Tj)
1.8
1.6
1.4
1.2
1
0.8
0.6
0.4
0.2
0
-50
0
50
100
150
Tj / OC
Fig.8. Normalised drain-source on-state resistance.
a = RDS(ON)/RDS(ON)25˚C = f(Tj); ID = 10 A; VIS = 4.4 V
RDS(ON) / mOhm
50
BUK135-50L
40
30
max.
typ.
20
10
0
0
1
2
3
4
5
6
7
8
VIS / V
Fig.9. Typical on-state resistance, Tj = 25˚C. RDS(ON)
= f(VIS); conditions: ID = 10 A; VPS = 4 V; tp = 300 µs
ID / A
80
y
BUK135-50L
70
VDS = 13V
60
50
40
30
20
10
0
0
1
2
3
4
5
6
7
8
VIS / V
Fig.10. Typical transfer characteristics, Tj = 25˚C.
ID = f(VIS); conditions: VPS ≥ 4 V tp = 300 µs
Tj (TO) OC
200
190
180
BUK135-50L
Data below 4V is for
information only. All
spec. values are for
normal operation at
4V and above.
170
160
150
3
Fig.11.
4
5
6
7
8
VPS / V
Typical overtemperature protection threshold.
Tj(TO) = f(VPS); conditions: VIS = 5 V
IDSS / A
100E-6
10E-6
BUK135-50L
max.
1E-6
typ.
100E-9
10E-9
1E-9
-50
0
50
100
150
Tj / OC
Fig.12. Typical drain source leakage current.
IDSS = f(Tj); conditions: VDS = 40 V; VPS = VIS = 0 V
IIS / mA
3.5
BUK135-50L
3.0
2.5
2.0
1.5
Latched
1.0
Unlatched
0.5
0
0
1
2
3
4
5
6
7
VIS / V
Fig.13. Typical DC input characteristics, Tj = 25˚C.
IIS & IISL = f(VIS); normal operation & protection latched
July 2002
7
Rev 1.100