PSMN2R0-30YL Datasheet, PDF (6/13 Pages) NXP Semiconductors – N-channel TrenchMOS logic level FET

NXP Semiconductors
PSMN2R0-30YL
N-channel TrenchMOS logic level FET
Table 6. Characteristics …continued
Symbol
Parameter
Conditions
Source-drain diode
V_SD
source-drain voltage I_S = 25 A; V_GS = 0 V; T_j = 25 °C; see
Figure 17
t_rr
reverse recovery time I_S = 20 A; dI_S/dt = -100 A/s; V_GS = 0 V;
Q_r
recovered charge
V_DS = 20 V
Min Typ Max Unit
-
0.88 1.2
V
-
43
-
ns
-
49
-
nC
80
I_D
(A)
60
40
20
0
0
003aac470
T_j = 150 °C
25 °C
1
2 _{VGS (V)} 3
150
10
I_D
(A) 4
100
50
0
0
2
003aac474
V_GS (V) = 3
2.8
2.6
2.4
2.2
4
6
8
10
V_DS (V)
Fig 5. Transfer characteristics: drain current as a
function of gate-source voltage; typical
values
Fig 6. Output characteristics: drain current as a
function of drain-source voltage; typical
values
7
R_DSon
(mΩ)
6
003aac475
160
g_fs
(S)
140
003aac477
5
120
V_GS (V) = 3 V
4
100
3
4
2
10
1
0
50
100 _{ID (A)} 150
80
60
40
0
20
40
60 _{ID (A)} 80
Fig 7. Drain-source on-state resistance as a
function of drain current; typical values
Fig 8. Forward transconductance as a function of
drain current; typical values
PSMN2R0-30YL_1
Preliminary data sheet
Rev. 01 — 10 September 2008
© NXP B.V. 2008. All rights reserved.
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