DAC1408D650_1011 Datasheet, PDF (59/98 Pages) NXP Semiconductors – Dual 14-bit DAC; up to 650 Msps; 2, 4 or 8 interpolating with JESD204A interface

NXP Semiconductors
DAC1408D650
2, 4 or 8 interpolating DAC with JESD204A
Table 81. FORCE_LOCK register (address 02h) bit description …continued
Default settings are shown highlighted.
Bit
Symbol
Access Value Description
0
SR_ILA
R/W
soft reset inter-lane alignment
0
no action
1
reset
Table 82. MAN_LOCK_LN_1_0 register (address 03h) bit description
Default settings are shown highlighted.
Bit
Symbol
Access Value Description
7 to 4 MAN_LOCK_LN1[3:0]
R/W
0h
manual lock setting synchronization word alignment
lane 1
3 to 0 MAN_LOCK_LN0[3:0]
R/W
0h
manual lock setting synchronization word alignment
lane 0
Table 83. MAN_LOCK_2_0 register (address 04h) bit description
Default settings are shown highlighted.
Bit
Symbol
Access Value Description
7 to 4 MAN_LOCK_LN3[3:0]
R/W
0h
manual lock setting synchronization word alignment
lane 3
3 to 0 MAN_LOCK_LN2[3:0]
R/W
0h
manual lock setting synchronization word alignment
lane 2
Table 84. CA_CNTRL register (address 05h) bit description
Bit
Symbol
Access Value
7
WORD_SWAP_LN3
R/W
0
1
6
WORD_SWAP_LN2
R/W
0
1
5
WORD_SWAP_LN1
R/W
0
1
4
WORD_SWAP_LN0
R/W
0
1
3
SELECT_RF_F10_LN3
R/W
0
1
2
SELECT_RF_F10_LN2
R/W
0
1
Description
lane 3 bit swapping
dout_ca_ln3[7:0] = din_ca_ln3[7:0]
dout_ca_ln3[7:0] = din_ca_ln3[0:7]
lane 2 bit swapping
dout_ca_ln2[7:0] = din_ca_ln2[7:0]
dout_ca_ln2[7:0] = din_ca_ln2[0:7]
lane 1 bit swapping
dout_ca_ln1[7:0] = din_ca_ln1[7:0]
dout_ca_ln1[7:0] = din_ca_ln1[0:7]
lane 0 bit swapping
dout_ca_ln0[7:0] = din_ca_ln0[7:0]
dout_ca_ln0[7:0] = din_ca_ln0[0:7]
lane 3 sampling mode
din_ca_ln3 sampled at falling edge f10_ln3
din_ca_ln3 sampled at rising edge f10_ln3
lane 2 sampling mode
din_ca_ln2 sampled at falling edge f10_ln2
din_ca_ln2 sampled at rising edge f10_ln2
DAC1408D650
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 26 November 2010
© NXP B.V. 2010. All rights reserved.
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