DAC1408D650_1011 Datasheet, PDF (57/98 Pages) NXP Semiconductors – Dual 14-bit DAC; up to 650 Msps; 2, 4 or 8 interpolating with JESD204A interface

Table 78.
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Page 4 register allocation map …continued
Address Register name R/W Bit definition
Default
b7
b6
b5
b4
b3
b2
b1
b0
Bin
Hex
18 12h INIT_SCR_
R/W
-
S7T1_LN0
INIT_VALUE_S7_S1_LN0[6:0]
00000000 00h
19 13h INIT_SCR_
R/W
S15T8_LN1
INIT_VALUE_S15_S8_LN1[7:0]
00000000 00h
20 14h INIT_SCR_
R/W
-
S7T1_LN1
INIT_VALUE_S7_S1_LN1[6:0]
00000000 00h
21 15h INIT_SCR_
R/W
S15T8_LN2
INIT_VALUE_S15_S8_LN2[7:0]
00000000 00h
22 16h INIT_SCR_
R/W
-
S7T1_LN2
INIT_VALUE_S7_S1_LN2[6:0]
00000000 00h
23 17h INIT_SCR_
R/W
S15T8_LN3
INIT_VALUE_S15_S8_LN3[7:0]
00000000 00h
24 18h INIT_SCR_
R/W
-
S7T1_LN3
INIT_VALUE_S7_S1_LN3[6:0]
00000000 00h
25 19h INIT_ILA_
R/W
BUFPTR_LN01
INIT_ILA_BUFPTR_LN1[3:0]
INIT_ILA_BUFPTR_LN0[3:0]
10001000 88h
26 1Ah INIT_ILA_
R/W
BUFPTR_LN23
INIT_ILA_BUFPTR_LN3[3:0]
INIT_ILA_BUFPTR_LN2[3:0]
10001000 88h
27 1Bh ERROR_
R/W
-
NAD_ERR_ KUX_CORR NAD_CORR CORR_MODE[1:0]
IMPL_ALT IGNORE_ 00000000 00h
HANDLING
CORR
ERR
28 1Ch REINIT_CNTRL R/W REINIT_ REINIT_ILA REINIT_ILA_ REINIT_ILA_ RESYNC_O RESYNC_O RESYNC_O RESYNC_O 00000000 00h
ILA_LN3
_LN2
LN1
LN0
_L_LN3
_L_LN2
_L_LN1
_L_LN0
31 1Fh PAGE_ADDRESS R/W
-
-
-
-
-
PAGE[2:0]
00000000 00h