UJA1061_10 Datasheet, PDF (53/77 Pages) NXP Semiconductors – Fault-tolerant CAN/LIN fail-safe system basis chip

NXP Semiconductors
UJA1061
Fault-tolerant CAN/LIN fail-safe system basis chip
Table 26. Static characteristics^[1] …continued
T_vj = −40 °C to +150 °C; V_BAT42 = 5.5 V to 52 V;V_BAT14 = 5.5 V to 27 V; V_BAT42 ≥ V_BAT14 − 1 V; unless otherwise specified. All
voltages are defined with respect to ground. Positive currents flow into the IC.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
LIN transmit data input; pin TXDL
V_IL
LOW-level input
voltage
−0.3
-
0.3 × V_V1 V
V_IH
HIGH-level input
voltage
0.7 × V_V1 -
V_V1 + 0.3 V
R_TXDL(pu)
TXDL pull-up resistor V_TXDL = 0 V
LIN receive data output; pin RXDL
5
12
25
kΩ
I_OH
HIGH-level output
V_RXDL = V_V1 − 0.4 V
−50
-
−1.6
mA
current
I_OL
LOW-level output
V_RXDL = 0.4 V
current
1.6
-
20
mA
LIN-bus line; pin LIN
V_o(dom)
I_LIH
I_LIL
I_o(sc)
LIN dominant output Active mode; V_BAT42 = 7 V to
0
-
voltage
18 V; LDC = 0;
t < t_{TXDL(dom)(dis)}; V_TXDL = 0 V;
R_BAT42-LIN = 500 Ω
Active mode; V_BAT42 = 7.6 V
to 18 V; LDC = 1;
0.7
1.4
t < t_{TXDL(dom)(dis)}; V_TXDL = 0 V;
I_LIN = 40 mA
HIGH-level input
V_LIN = V_BAT42; V_TXDL = V_V1
−10
0
leakage current
V_BAT42 = 8 V;
−10
-
V_LIN = 8 V to 18 V; V_TXDL = V_V1
LOW-level input
leakage current
V_BAT42 = 12 V; V_LIN = 0 V;
V_TXDL = V_V1
−100 -
short-circuit output Active mode;
27
40
current
V_LIN = V_BAT42 = 12 V;
V_TXDL = 0 V; t < t_{TXDL(dom)(dis)};
LDC = 0
0.20 × V
V_BAT42
2.1
V
+10
μA
+10
μA
-
μA
60
mA
Active mode;
40
60
90
mA
V_LIN = V_BAT42 = 18 V;
V_TXDL = 0 V; t < t_{TXDL(dom)(dis)};
LDC = 0
V_th(dom)
V_th(reces)
V_th(hyst)
V_th(cen)
C_in
I_L
receiver dominant
state
receiver recessive
state
receiver threshold
voltage hysteresis
receiver threshold
voltage centre
input capacitance
leakage current
V_BAT42 = 7 V to 27 V
V_BAT42 = 7 V to 27 V
V_BAT42 = 7 V to 27 V
V_BAT42 = 7 V to 27 V
-
-
0.4 ×
V
V_BAT42
0.6 × -
-
V
V_BAT42
0.05 × -
V_BAT42
0.175 × V
V_BAT42
0.475 × 0.500 × 0.525 × V
V_BAT42
V_BAT42
V_BAT42
[3] _-
-
10
pF
V_LIN = 0 V to 18 V; V_BAT42 = 0 V
−5
0
V_LIN = 0 V to 18 V;
−10
-
V_BAT42 = V_GND = 12 V (loss of
ground)
+5
μA
+10
μA
UJA1061_6
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 06 — 9 March 2010
© NXP B.V. 2010. All rights reserved.
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