TDA8594 Datasheet, PDF (5/48 Pages) NXP Semiconductors – I2C-bus controlled 4 X 50 W power amplifier

NXP Semiconductors
TDA8594
I²C-bus controlled 4 × 50 W power amplifier
Table 3.
Symbol
OUT1−
PGND1
OUT1+
SVR
IN1
IN2
SGND
IN4
IN3
ACGND
OUT3+
PGND3
OUT3−
V_P1
OUT4+
SCL
OUT4−
PGND4
SDA
TAB
Pin description …continued
Pin
Description
8
negative channel 1 output
9
power ground channel 1
10
positive channel 1 output
11
half supply filter capacitor
12
channel 1 input
13
channel 2 input
14
signal ground
15
channel 4 input
16
channel 3 input
17
AC ground input
18
positive channel 3 output
19
power ground channel 3
20
negative channel 3 output
21
supply voltage 1
22
positive channel 4 output
23
I²C-bus clock input
24
negative channel 4 output
25
power ground channel 4
26
I²C-bus data input/output
27
heatsink connection, must be connected to ground
To keep the output pins on the front side, special reverse bending is applied.
7. Functional description
The TDA8594 is a complementary quad BTL audio power amplifier made in BCDMOS
technology. It contains four independent amplifiers in BTL configuration (see Figure 1).
Through the I²C-bus, the diagnostic functions of temperature level and clip level are fully
programmable and the information to be shown on the two diagnostic pins can be
selected. The status of each amplifier (output offset, load or no load, short-circuit or
speaker incorrectly connected) can be read separately. The TDA8594 is protected against
overvoltage, short-circuit, over-temperature, open ground and open V_P connections.
Three different I²C-bus addresses are selected with an external resistor connected to the
ADSEL pin. If the ADSEL pin is short-circuit to ground, the TDA8594 operates in legacy
mode. In this mode, no I²C-bus is needed and the function of the STB pin will change from
two-level (Standby mode and On mode) to a three-level pin (Standby mode, On mode and
mute).
7.1 Input stage
The input stage is a high-impedance pseudo-differential input stage. The negative inputs
of the four channels are combined on the ACGND pin. For the best performance on
supply voltage ripple rejection and pop noise, the capacitor connected to the ACGND pin
must be four times the value of the input capacitor (or as close to the value as possible).
TDA8594_2
Product data sheet
Rev. 02 — 11 December 2007
© NXP B.V. 2007. All rights reserved.
5 of 48