TDA8594 Datasheet, PDF (29/48 Pages) NXP Semiconductors – I2C-bus controlled 4 X 50 W power amplifier

NXP Semiconductors
TDA8594
I²C-bus controlled 4 × 50 W power amplifier
Table 17. Characteristics …continued
Refer to Figure 29 at V_P = V_P1 = V_P2 = 14.4 V; R_L = 4 Ω; f = 1 kHz; R_S = 0 Ω; normal mode; unless otherwise specified.
Tested at T_amb = 25 °C; guaranteed for T_amb = −40 °C to +105 °C.
Symbol
Parameter
Conditions
Min Typ Max Unit
t_{amp_on}
amplifier on time
time from amplifier mute to
[3]
amplifier on; 90 % of output
signal; I_LO = 0 µA
I²C-bus mode;
360 520 870 ms
with I_LO = 10 µA → +30 ms;
no DC load (IB1[D1] = 0);
low pop disabled (IB2[D3] = 1);
see Figure 3
I²C-bus mode;
with I_LO = 10 µA → +35 ms;
DC load active (IB1[D1] = 1);
low pop disabled (IB2[D3] = 1);
see Figure 4
565 695 1015 ms
I²C-bus mode;
with I_LO = 10 µA → +30 ms;
DC load active (IB1[D1] = 1);
low pop enabled (IB2[D3] = 0);
see Figure 5
710 890 1270 ms
legacy mode;
with I_LO = 10 µA → +20 ms;
V_STB = 7 V; R_ADSEL = 0 Ω;
see Figure 6
510 720 1120 ms
t_off
amplifier switch-off time
time to DC output voltage < 0.1 V; ^[3]
I²C-bus mode; I_LO = 0 µA
with I_LO = 10 µA → +0 ms;
low pop enabled (IB2[D3] = 0);
120 245 530 ms
see Figure 4
with I_LO = 10 µA → +0 ms;
low pop disabled (IB2[D3] = 1);
see Figure 5
140 280 620 ms
t_d(mute-on)
mute to on delay time
t_{d(soft_mute)}
soft mute delay time
from 10 % to 90 % of output
-
signal; IB2[D1] and IB2[D2] = 1 to
0; V_i = 50 mV; see Figure 6
from 90 % to 10 % of output
-
signal; V_i = 50 mV; IB2[D1] and
IB2[D2] = 0 to 1 (soft mute);
see Figure 6
20
40
ms
20
40
ms
t_{d(fast_mute)}
fast mute delay time
from 90 % to 10 % of output
signal; V_STB from 8 V to 1.3 V
(fast mute); see Figure 6
-
0.1 1
ms
t_{(start-Vo(off))}
engine start to output off time V_P from 14.4 V to 7 V; V_o < 0.5 V;
-
see Figure 8
0.1 1
ms
t_{(start-SVRoff)}
engine start to SVR off time
I²C-bus interface^[4]
V_P from 14.4 V to 7 V;
V_SVR < 2 V; see Figure 8
-
40
75
ms
V_IL
LOW-level input voltage
pins SCL and SDA
V_IH
HIGH-level input voltage
pins SCL and SDA
V_OL
LOW-level output voltage
pin SDA; I_L = 5 mA
-
-
2.3 -
-
-
1.5 V
5.5 V
0.4 V
TDA8594_2
Product data sheet
Rev. 02 — 11 December 2007
© NXP B.V. 2007. All rights reserved.
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