PN512_11 Datasheet, PDF (48/125 Pages) NXP Semiconductors – Transmission module Integrated data mode detector

NXP Semiconductors
PN512
Transmission module
9.2.3 Page 2: Configuration
9.2.3.1 PageReg
Selects the register page.
Table 78. PageReg register (address 20h); reset value: 00h, 00000000b
7
6
5
4
3
2
UsePageSelect 0
0
0
0
0
Access Rights
r/w
RFU RFU RFU RFU RFU
1
0
PageSelect
r/w
r/w
Table 79. Description of PageReg bits
Bit
Symbol
Description
7
UsePageSelect Set to logic 1, the value of PageSelect is used as register address A5
and A4. The LSB-bits of the register address are defined by the
address pins or the internal address latch, respectively.
Set to logic 0, the whole content of the internal address latch defines
the register address. The address pins are used as described in
Section 10.1 “Automatic microcontroller interface detection”.
6 to 2 -
Reserved for future use.
1 to 0
PageSelect
The value of PageSelect is used only if UsePageSelect is set to
logic 1. In this case, it specifies the register page (which is A5 and
A4of the register address).
9.2.3.2 CRCResultReg
Shows the actual MSB and LSB values of the CRC calculation.
Note: The CRC is split into two 8-bit register.
Note: Setting the bit MSBFirst in ModeReg register reverses the bit order, the byte order is
not changed.
Table 80. CRCResultReg register (address 21h); reset value: FFh, 11111111b
7
6
5
4
3
2
1
0
CRCResultMSB
Access Rights
r
r
r
r
r
r
r
r
Table 81.
Bit
7 to 0
Description of CRCResultReg bits
Symbol
Description
CRCResultMSB This register shows the actual value of the most significant byte of
the CRCResultReg register. It is valid only if bit CRCReady in
register Status1Reg is set to logic 1.
Table 82. CRCResultReg register (address 22h); reset value: FFh, 11111111b
7
6
5
4
3
2
1
0
CRCResultLSB
Access Rights
r
r
r
r
r
r
r
r
Table 83. Description of CRCResultReg bits
Bit
Symbol
Description
7 to 0
CRCResultLSB
This register shows the actual value of the least significant byte of
the CRCResult register. It is valid only if bit CRCReady in register
Status1Reg is set to logic 1.
PN512
Product data sheet
COMPANY PUBLIC
All information provided in this document is subject to legal disclaimers.
Rev. 3.7 — 18 May 2011
111337
© NXP B.V. 2011. All rights reserved.
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