PN512_11 Datasheet, PDF (20/125 Pages) NXP Semiconductors – Transmission module Integrated data mode detector

NXP Semiconductors
PN512
Transmission module
9.2 Register description
9.2.1 Page 0: Command and status
9.2.1.1 PageReg
Selects the register page.
Table 16. PageReg register (address 00h); reset value: 00h, 0000000b
7
6
5
4
3
2
UsePage Select
0
0
0
0
0
Access
r/w
Rights
RFU RFU RFU RFU RFU
1
0
PageSelect
r/w
r/w
Table 17. Description of PageReg bits
Bit
Symbol
Description
7
UsePageSelect Set to logic 1, the value of PageSelect is used as register address A5
and A4. The LSB-bits of the register address are defined by the
address pins or the internal address latch, respectively.
Set to logic 0, the whole content of the internal address latch defines
the register address. The address pins are used as described in
Section 10.1 “Automatic microcontroller interface detection”.
6 to 2 -
Reserved for future use.
1 to 0 PageSelect
The value of PageSelect is used only if UsePageSelect is set to
logic 1. In this case it specifies the register page (which is A5 and A4
of the register address).
9.2.1.2 CommandReg
Starts and stops command execution.
Table 18. CommandReg register (address 01h); reset value: 20h, 00100000b
7
6
5
4
3
2
1
0
0
0
RcvOff Power Down
Command
Access RFU
RFU
r/w
dy
dy
dy
dy
dy
Rights
Table 19. Description of CommandReg bits
Bit
Symbol
Description
7 to 6 -
Reserved for future use.
5
RcvOff
Set to logic 1, the analog part of the receiver is switched off.
4
PowerDown Set to logic 1, Soft Power-down mode is entered.
Set to logic 0, the PN512 starts the wake up procedure. During this
procedure this bit still shows a 1. A 0 indicates that the PN512 is ready
for operations; see Section 16.2 “Soft power-down mode”.
Note: The bit Power Down cannot be set, when the command
SoftReset has been activated.
3 to 0
Command
Activates a command according to the Command Code. Reading this
register shows, which command is actually executed (see Section 19.3
“PN512 command overview”).
PN512
Product data sheet
COMPANY PUBLIC
All information provided in this document is subject to legal disclaimers.
Rev. 3.7 — 18 May 2011
111337
© NXP B.V. 2011. All rights reserved.
20 of 125