PCA9663 Datasheet, PDF (48/66 Pages) NXP Semiconductors – Parallel bus to 3 channel Fm+ I2C-bus controller

NXP Semiconductors
PCA9663
Parallel bus to 3 channel Fm+ I²C-bus controller
10. JTAG port
The PCA9663 has a JTAG IEEE 1149.1 compliant port. All signals (TDI, TMS, TCK,
TRSTN and TDO) are accessible. Only EXTEST functions are enabled, for example to
conduct board-level continuity tests. Device debug/emulation functionality such as
INTEST commands are not supported. The JTAG port is used for boundary scan testing
(i.e., opens/shorts) during PCB manufacturing.
The following EXTEST JTAG instructions are supported:
• BYPASS
• EXTEST
• IDCODE
• SAMPLE
• PRELOAD
• CLAMP
• HIGHZ
If the JTAG boundary scan is not being used, then the JTAG pins must be held in the
following states:
• TDI, TCK, TMS: V_DD
• TRSTN: V_SS
PCA9663
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 6 June 2011
© NXP B.V. 2011. All rights reserved.
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