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ICM7555IN Datasheet, PDF (4/22 Pages) NXP Semiconductors – General purpose CMOS timer
NXP Semiconductors
ICM7555
General purpose CMOS timer
8. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter
Conditions
VDD
supply voltage
VI
input voltage
TRIGGER
CONTROL_VOLTAGE
THRESHOLD
RESET
IO
output current
P
power dissipation
Tamb = 25 °C (still air)
DIP8 package
SO8 package
Tstg
storage temperature
Tsp
solder point temperature
soldering 60 s
Min
[1] −0.3
−0.3
−0.3
−0.3
-
[2][3]
-
-
−65
-
Max
18
VDD + 0.3
VDD + 0.3
VDD + 0.3
VDD + 0.3
100
Unit
V
V
V
V
V
mA
1160
mW
780
mW
+150
°C
300
°C
[1] Due to the SCR structure inherent in the CMOS process used to fabricate these devices, connecting any terminal to a voltage greater
than VDD + 0.3 V or less than GND − 0.3 V may cause destructive latch-up. For this reason it is recommended that no inputs from
external sources not operating from the same power supply be applied to the device before its power supply is established. In multiple
systems, the supply of the ICM7555 must be turned on first.
[2] Above 25 °C, derate at the following rates:
DIP8 package at 9.3 mW / °C
SO8 package at 6.2 mW / °C
[3] Refer to Section 11.2 “Power supply considerations” section.
9. Characteristics
Table 5. Characteristics
Tamb = 25 °C unless otherwise specified.
Sym Parameter
bol
Conditions
VDD supply voltage
IDD supply current[1]
Tmin ≤ Tamb ≤ Tmax
VDD = Vmin
Astable mode timing[2][3]
VDD = Vmax
∆f/f frequency stability
∆f/∆V frequency variation with voltage
∆f/∆T frequency variation with
temperature[4]
VDD = 5 V
VDD = 10 V
VDD = 15 V
VI
input voltage
TRIGGER: VDD = 5 V
CONTROL_VOLTAGE: VDD = 5 V
THRESHOLD: VDD = 5 V
RESET: VDD = Vmin and Vmax
Min
Typ
Max
Unit
3
-
16
V
-
50
200
µA
-
180
300
µA
-
-
-
-
-
0.29VDD
0.62VDD
0.63VDD
0.4VDD
1.0
0.1
50
75
100
0.31VDD
0.65VDD
0.65VDD
0.7VDD
5.0
3.0
-
-
-
0.34VDD
0.67VDD
0.67VDD
1.0VDD
%
%/V
ppm/°C
ppm/°C
ppm/°C
V
V
V
V
ICM7555_2
Product data sheet
Rev. 02 — 3 August 2009
© NXP B.V. 2009. All rights reserved.
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