ICM7555IN Datasheet, PDF (12/22 Pages) NXP Semiconductors – General purpose CMOS timer

NXP Semiconductors
ICM7555
General purpose CMOS timer
11.4 Astable operation
If the circuit is connected as shown in Figure 15, it will trigger itself and free run as a
multivibrator. The external capacitor charges through R_A and R_B and discharges through
R_B only. Thus, the duty cycle (δ) may be precisely set by the ratio of these two resistors. In
this mode of operation, the capacitor charges and discharges between ¹â„₃ V_DD and
2_{⁄3 VDD. Since the charge rate and the threshold levels are directly proportional to the}
supply voltage, the frequency of oscillation is independent of the supply voltage.
f = ₍---_R----_A----₊----¹-₂--^.-³-_R--⁸--_B---₎---_×-----_C---
(1)
δ = --^R----^A-----⁺-----^R---^B---
(2)
R_A + 2R_B
V_DD
1 _GND
V_DD ⁸
V_DD
RA
2 _TRIGGER
DISCHARGE ⁷
OUTPUT
3 _OUTPUT
THRESHOLD ⁶
RB
V_DD ⁴ RESET
CONTROL_VOLTAGE ⁵
C
Fig 15. Astable operation
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11.5 Monostable operation
In this mode of operation, the timer functions as a one-shot. Initially, the external
capacitor (C) is held discharged by a transistor inside the timer. Upon application of a
negative pulse to pin 2, TRIGGER, the internal flip-flop is set, which releases the
low-impedance on DISCHARGE; the external capacitor charges and drives the OUTPUT
HIGH. The voltage across the capacitor increases exponentially with a time constant
t = R_AC. When the voltage across the capacitor equals ²â„₃ V+, the comparator resets the
flip-flop, which in turn discharges the capacitor rapidly and also drives the OUTPUT to its
LOW state. TRIGGER must return to a HIGH state before the OUTPUT can return to a
LOW state.
ICM7555_2
Product data sheet
Rev. 02 — 3 August 2009
© NXP B.V. 2009. All rights reserved.
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