PSMN2R0-30YL_11 Datasheet, PDF (3/14 Pages) NXP Semiconductors – N-channel 30 V 2 mΩ logic level MOSFET in LFPAK

NXP Semiconductors
PSMN2R0-30YL
N-channel 30 V 2 mΩ logic level MOSFET in LFPAK
4. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
V_DS
V_DSM
V_DGR
V_GS
I_D
drain-source voltage
peak drain-source voltage
drain-gate voltage
gate-source voltage
drain current
T_j ≥ 25 °C; T_j ≤ 175 °C
t_p ≤ 25 ns; f ≤ 500 kHz;
E_DS(AL) ≤ 280 nJ; pulsed
T_j ≥ 25 °C; T_j ≤ 175 °C; R_GS = 20 kΩ
V_GS = 10 V; T_mb = 100 °C; see Figure 1
V_GS = 10 V; T_mb = 25 °C; see Figure 1;
see Figure 3
I_DM
peak drain current
pulsed; t_p ≤ 10 µs; T_mb = 25 °C;
see Figure 3
P_tot
total power dissipation
T_stg
storage temperature
T_j
junction temperature
Source-drain diode
T_mb = 25 °C; see Figure 2
I_S
source current
I_SM
peak source current
Avalanche ruggedness
T_mb = 25 °C
pulsed; t_p ≤ 10 µs; T_mb = 25 °C
E_DS(AL)S
non-repetitive drain-source
avalanche energy
V_GS = 10 V; T_j(init) = 25 °C; I_D = 100 A;
V_sup ≤ 30 V; R_GS = 50 Ω; unclamped
[1] Continuous current is limited by package.
Min Max Unit
-
30 V
-
35 V
-
-20
[1] _-
[1] _-
30 V
20 V
100 A
100 A
-
667 A
-
97 W
-55 175 °C
-55 175 °C
[1] _-
100 A
-
667 A
-
151 mJ
120
I_D
(A)
100
80
60
40
20
0
0
003aac471
(1)
50
100
150
200
T_mb (°C)
120
P_der
(%)
80
03aa16
40
0
0
50
100
150
200
T_mb (°C)
Fig 1. Continuous drain current as a function of
mounting base temperature
Fig 2. Normalized total power dissipation as a
function of mounting base temperature
PSMN2R0-30YL
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 10 March 2011
© NXP B.V. 2011. All rights reserved.
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