GTL2005 Datasheet, PDF (3/19 Pages) NXP Semiconductors – Quad GTL/GTL to LVTTL/TTL bidirectional non-latched translator

NXP Semiconductors
GTL2005
Quad GTL/GTL+ to LVTTL/TTL bidirectional non-latched translator
5. Functional diagram
GTL2005
A0
B0
A1
B1
A2
B2
A3
VREF
Fig 2. Logic diagram of GTL2005
6. Pinning information
6.1 Pinning
B3
002aab151
DIR
DIR 1
A0 2
A1 3
VREF 4
A2 5
A3 6
GND 7
GTL2005PW
14 V_CC
13 B0
12 B1
11 GND
10 B2
9 B3
8 GND
002aab150
Fig 3. Pin configuration for TSSOP14
GTL2005_7
Product data sheet
Rev. 07 — 3 February 2009
© NXP B.V. 2009. All rights reserved.
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