English
Language : 

GTL2005 Datasheet, PDF (12/19 Pages) NXP Semiconductors – Quad GTL/GTL to LVTTL/TTL bidirectional non-latched translator
NXP Semiconductors
GTL2005
Quad GTL/GTL+ to LVTTL/TTL bidirectional non-latched translator
input
output
Vref
tPLH
1.5 V
3.0 V
Vref
0V
tPHL
VOH
1.5 V
VOL
002aab163
PRR ≤ 10 MHz; Zo = 50 Ω; tr ≤ 2.5 ns; tf ≤ 2.5 ns
Fig 8. Propagation delay, An to Bn
12. Test information
PULSE
VI
GENERATOR
VCC
VO
DUT
RT
Fig 9. Load circuitry for switching times
CL
50 pF
RL
500 Ω
002aab006
VTT
PULSE
VI
GENERATOR
VCC
VO
DUT
25 Ω
RT
CL
30 pF
002aab143
Fig 10. Load circuit for A (GTL) outputs
RL — Load resistor
CL — Load capacitance; includes jig and probe capacitance
RT — Termination resistance; should be equal to Zo of pulse generators.
GTL2005_7
Product data sheet
Rev. 07 — 3 February 2009
© NXP B.V. 2009. All rights reserved.
12 of 19