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PSMN008-75P Datasheet, PDF (2/12 Pages) NXP Semiconductors – N-channel enhancement mode field-effect transistor
NXP Semiconductors
2. Pinning information
Table 2. Pinning information
Pin
Symbol Description
1
G
gate
2
D
drain
3
S
source
mb
D
mounting base; connected to
drain
PSMN008-75P
N-channel TrenchMOS SiliconMAX standard level FET
Simplified outline
mb
Graphic symbol
D
G
mbb076 S
3. Ordering information
123
SOT78 (TO-220AB)
Table 3. Ordering information
Type number
Package
Name
Description
Version
PSMN008-75P
TO-220AB plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead SOT78
TO-220AB
4. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter
Conditions
VDS
VDGR
VGS
ID
drain-source voltage
drain-gate voltage
gate-source voltage
drain current
IDM
peak drain current
Ptot
total power dissipation
Tstg
storage temperature
Tj
junction temperature
Source-drain diode
Tj ≥ 25 °C; Tj ≤ 175 °C
Tj ≤ 175 °C; Tj ≥ 25 °C; RGS = 20 Ω
VGS = 10 V; Tmb = 100 °C; see Figure 1
VGS = 10 V; Tmb = 25 °C; see Figure 1 and 3
tp ≤ 10 µs; pulsed; Tmb = 25 °C; see Figure 1 and 3
Tmb = 25 °C; see Figure 2
IS
source current
ISM
peak source current
Avalanche ruggedness
Tmb = 25 °C
tp ≤ 10 µs; pulsed; Tmb = 25 °C
EDS(AL)S
non-repetitive
VGS = 10 V; Tj(init) = 25 °C; ID = 63 A; Vsup ≤ 15 V;
drain-source avalanche unclamped; RGS = 50 Ω; tp = 0.129 ms
energy
PSMN008-75P_4
Product data sheet
Rev. 04 — 10 December 2009
Min Max Unit
-
75
V
-
75
V
-20 20
V
-
75
A
-
75
A
-
240 A
-
230 W
-55 175 °C
-55 175 °C
-
75
A
-
240 A
-
395 mJ
© NXP B.V. 2009. All rights reserved.
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