74HC73 Datasheet, PDF (2/16 Pages) NXP Semiconductors – Dual JK flip-flop with reset; negative-edge trigger

NXP Semiconductors
4. Functional diagram
74HC73
Dual JK flip-flop with reset; negative-edge trigger
Fig 1. Functional diagram
14 1J
1 1CP
J
Q
FF1
CP
1Q 12
3 1K
2 1R
K
Q
R
1Q 13
7 2J
5 2CP
J
Q
FF2
CP
2Q 9
10 2K
6 2R
K
Q
R
2Q 8
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14 1J
7 2J
1 1CP
5 2CP
3 1K
10 2K
J
FF
CP
K
R
Q ^{1Q 12}
2Q 9
Q ^{1Q 13}
2Q 8
1R 2R
26
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Fig 2. Logic symbol
14 _1J
12
1 _C1
3 _1K
13
2R
7 _1J
9
5 _C1
10 _1K
8
6R
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Fig 3. IEC logic symbol
74HC73_4
Product data sheet
Rev. 04 — 19 March 2008
© NXP B.V. 2008. All rights reserved.
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