TDA6650TT Datasheet, PDF (13/54 Pages) NXP Semiconductors – 5 V mixer/oscillator and low noise PLL synthesizer for hybrid terrestrial tuner (digital and analog)

NXP Semiconductors
TDA6650TT; TDA6651TT
5 V mixer/oscillator and low noise PLL synthesizer
Table 14. ALBC band selection and charge current setting…continued
LO frequency
Band
Charge pump current
number
184 MHz to 196 MHz
low
7
196 MHz to 224 MHz
mid
2
224 MHz to 296 MHz
mid
3
296 MHz to 380 MHz
mid
4
380 MHz to 404 MHz
mid
5
404 MHz to 448 MHz
mid
6
448 MHz to 472 MHz
mid
7
472 MHz to 484 MHz
mid
8
484 MHz to 604 MHz
high
4
604 MHz to 676 MHz
high
5
676 MHz to 752 MHz
high
6
752 MHz to 868 MHz
high
7
868 MHz to 904 MHz
high
8
8.2 Read mode; R/W = 1
Data can be read from the device by setting the R/W bit to 1 (see Table 15). After the
device address has been recognized, the device generates an acknowledge pulse and the
first data byte (status byte) is transferred on the SDA line (MSB first). Data is valid on the
SDA line during a HIGH level of the SCL clock signal.
A second data byte can be read from the device if the microcontroller generates an
acknowledge on the SDA line (master acknowledge). End of transmission will occur if no
master acknowledge occurs. The device will then release the data line to allow the
microcontroller to generate a STOP condition.
Table 15. I²C-bus read data format
Name
Byte Bit
MSB^[1]
Address byte 1
1
1
0
0
Status byte 2
POR FL
ALBC 1
[1] MSB is transmitted first.
0
AGC
MA1
A2
MA0
A1
ACK
LSB
R/W = 1 A
A0
-
Table 16.
Bit
A
POR
FL
Description of read data format bits
Description
acknowledge bit
power-on reset flag
POR = 0, normal operation
POR = 1, power-on reset
in-lock flag
FL = 0, not locked
FL = 1, the PLL is locked
TDA6650TT_6651TT_5
Product data sheet
Rev. 05 — 10 January 2007
© NXP B.V. 2007. All rights reserved.
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