74HC74D-T Datasheet, PDF (13/22 Pages) NXP Semiconductors – Dual D-type flip-flop with set and reset; positive-edge trigger

Philips Semiconductors
Dual D-type flip-flop with set and reset;
positive-edge trigger
AC WAVEFORMS
Product specification
74HC74; 74HCT74
handbook, full pagewidth
VI
nD input
GND
VI
nCP input
GND
VOH
nQ output
VOL
VOH
nQ output
VOL
VM
th
t _su
th
t _su
1/fmax
VM
tW
t _PHL
VM
t _PLH
VM
t _PLH
t _PHL
MNA422
The shaded areas indicate when the input is permitted to change for predictable output performance.
74HC74: V_M = 50%; V_I = GND to V_CC.
74HCT74: V_M = 1.3 V; V_I = GND to 3 V.
Fig.7 The clock (nCP) to output (nQ, nQ) propagation delays, the clock pulse width, the nD to nCP set-up,
the nCP to nD hold times, the output transition times and the maximum clock pulse frequency.
2003 Jul 10
13