English
Language : 

74HC74D-T Datasheet, PDF (11/22 Pages) NXP Semiconductors – Dual D-type flip-flop with set and reset; positive-edge trigger
Philips Semiconductors
Dual D-type flip-flop with set and reset;
positive-edge trigger
Product specification
74HC74; 74HCT74
SYMBOL
PARAMETER
TEST CONDITIONS
WAVEFORMS
VCC (V)
MIN.
Tamb = −40 to +125 °C
tPHL/tPLH
propagation delay
nCP to nQ, nQ
see Fig.7
2.0
−
4.5
−
6.0
−
propagation delay
nSD to nQ, nQ
see Fig.8
2.0
−
4.5
−
6.0
−
propagation delay
nRD to nQ, nQ
see Fig.8
2.0
−
4.5
−
6.0
−
tTHL/tTLH
output transition time see Fig.7
2.0
−
4.5
−
6.0
−
tW
clock pulse width HIGH see Fig.7
or LOW
2.0
120
4.5
24
6.0
20
tW
set or reset pulse width see Fig.8
LOW
2.0
120
4.5
24
6.0
20
trem
removal time set or
see Fig.8
reset
2.0
45
4.5
9
6.0
8
tsu
set-up time nD to nCP see Fig.7
2.0
90
4.5
18
6.0
15
th
hold time nCP to nD see Fig.7
2.0
3
4.5
3
6.0
3
fmax
maximum clock pulse see Fig.7
frequency
2.0
4.0
4.5
20
6.0
24
TYP.
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
MAX.
265
53
45
300
60
51
300
60
51
110
22
19
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MHz
MHz
MHz
2003 Jul 10
11