74HC595BQ115 Datasheet, PDF(12/24 Page) NXP Semiconductors – 8-bit serial-in, serial or parallel-out shift register with output latches; 3-state

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74HC595BQ115 Datasheet, PDF (12/24 Pages) NXP Semiconductors – 8-bit serial-in, serial or parallel-out shift register with output latches; 3-state

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NXP Semiconductors

74HC595; 74HCT595

8-bit serial-in, serial or parallel-out shift register with output latches;

3-state

Table 7. Dynamic characteristics â¦continued

Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 14.

Symbol Parameter Conditions

25 ï°C

ï40 ï°C to +85 ï°C ï40 ï°C to +125 ï°C Unit

Min Typ[1] Max Min

Max

Min

Max

trec

recovery MR to SHCP; see Figure 12

10 ï7 - 13

- ns

time

fmax

maximum SHCP and STCP;

frequency see Figure 9 and 10

30 52 - 24

- MHz

CPD

power

fi = 1 MHz; VI = GND to VCC [6] - 130 -

- pF

dissipation

[7]

capacitance

[1] Typical values are measured at nominal supply voltage.

[2] tpd is the same as tPHL and tPLH.

[3] tpd is the same as tPHL only.

[4] ten is the same as tPZL and tPZH.

[5] tdis is the same as tPLZ and tPHZ.

[6] CPD is used to determine the dynamic power dissipation (PD in ïW).

PD = CPD ï´ VCC2 ï´ fi + ï(CL ï´ VCC2 ï´ fo) where:

fi = input frequency in MHz;

fo = output frequency in MHz;

ï(CL ï´ VCC2 ï´ fo) = sum of outputs;

CL = output load capacitance in pF;

VCC = supply voltage in V.

[7] All 9 outputs switching.

12. Waveforms

SHCP input

GND

VOH

Q7S output

VOL

1/ fmax

t PLH

t PHL

mna557

Fig 9.

Measurement points are given in Table 8.

VOL and VOH are typical output voltage levels that occur with the output load.

Shift clock pulse, maximum frequency and input to output propagation delays

74HC_HCT595

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 6 â 12 December 2011

12 of 24

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