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PQMD12 Datasheet, PDF (1/13 Pages) NXP Semiconductors – NPN/PNP resistor-equipped transistors; R1 = 47 k, R2 = 47 k | |||
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PQMD12
NPN/PNP resistor-equipped transistors;
R1 = 47 kΩ, R2 = 47 kΩ
24 July 2013
Product data sheet
1. General description
NPN/PNP double Resistor-Equipped Transistors (RET) in a leadless ultra small
DFN1010B-6 (SOT1216) Surface-Mounted Device (SMD) plastic package.
2. Features and benefits
⢠100 mA output current capability
⢠Built-in bias resistors
⢠Simplifies circuit design
⢠Low package height of 0.37 mm
⢠Reduces component count
⢠Reduces pick and place costs
⢠AEC-Q101 qualified
3. Applications
⢠Low current peripheral driver
⢠Control of IC inputs
⢠Replaces general-purpose transistors in digital applications
⢠Mobile applications
4. Quick reference data
Table 1. Quick reference data
Symbol
Parameter
Conditions
Per transistor; for the PNP transistor with negative polarity
VCEO
collector-emitter
voltage
open base
IO
output current
Per transistor; for the PNP transistor with negative polarity
R1
resistance 1
Tamb = 25 °C
R2/R1
resistance ratio
Min Typ Max Unit
-
-
50
V
-
-
100 mA
33
47
0.8 1
61
kΩ
1.2
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