PC87365 Datasheet, PDF (91/215 Pages) National Semiconductor (TI) – 128-Pin LPC SuperI/O with System Hardware Monitoring

3.0 System Wake-Up Control (SWC) (Continued)
3.4.6 Wake-Up Configuration Register (WK_CFG)
This register is set to 00h on power-up of V_PP or software reset. It enables access to CEIR registers, keyboard/mouse reg-
isters, Event Routing Control registers or Standby GPIO registers.
Location: Offset 04h
Type:
R/W
Bit
7
Name
Reset
0
Required
0
6
5
Reserved
0
0
0
4
3
2
1
0
Enable
Power Swap KBC
Button
Inputs
Pulse on S3
Configuration Bank
Select
0
0
0
0
0
Bit
Description
7-4 Reserved.
3 Enable Power Button Pulse on S3.
0: Disabled (default)
1: Enabled
2 Swap KBC Inputs.
0: No swapping (default)
1: KBD (KBCLK, KBDAT) and Mouse (MCLK, MDAT) inputs swapped
1-0 Configuration Bank Select.
Bits
1 0 Bank Register
00 0
01 1
10 2
11 3
Keyboard/Mouse
CEIR
Event Routing, Wake-Up Extension
Standby GPIO
91
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