DS90CR287_04 Datasheet, PDF (8/16 Pages) National Semiconductor (TI) – +3.3V Rising Edge Data Strobe LVDS 28-Bit Channel Link-85 MHz

AC Timing Diagrams (Continued)
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FIGURE 10. DS90CR288A (Receiver) Phase Lock Loop Set Time
FIGURE 11. 28 Parallel TTL Data Inputs Mapped to LVDS Outputs
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FIGURE 12. Transmitter Powerdown Delay
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