DS90CR287_04 Datasheet, PDF (15/16 Pages) National Semiconductor (TI) – +3.3V Rising Edge Data Strobe LVDS 28-Bit Channel Link-85 MHz

Applications Information (Continued)
Input Clock section. Do not power up and enable (PWR
DOWN = HIGH) the transmitter without a valid clock signal
applied to the TxCLK IN pin.
The CHANNEL LINK chipset is designed to protect itself
from accidental loss of power to either the transmitter or
receiver. If power to the transmit board is lost, the receiver
clocks (input and output) stop. The data outputs (RxOUT)
retain the states they were in when the clocks stopped.
When the receiver board loses power, the receiver inputs are
shorted to V_CC through an internal diode. Current is limited
(5 mA per input) by the fixed current mode drivers, thus
avoiding the potential for latchup when powering the device.
FIGURE 19. Single-Ended and Differential Waveforms
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