DS16EV5110 Datasheet, PDF (8/16 Pages) –

Serial Management Bus (SMBus)
Configuration Registers
The Serial Management Bus interface is compatible to SM-
Bus 2.0 physical layer specification, except for bus termina-
tion voltages. Holding the CS pin high enables the SMBus port
allowing access to the SMBus registers. The configuration
registers can be read and written using SMBus through SDA
and SDC pins. In the STANDBY state, the Serial Manage-
ment Bus remains active. Please see Table 1 for more infor-
mation.
TABLE 1. SMBus Register Address
Name
Address Default Type Bit 7
Bit 6 Bit 5 Bit 4 Bit 3
Bit 2
Bit 1
Bit 0
Stauts
0X00
0X00 RO ID Revision
Reserved Reserved Reserved SD
Status
0X01
0X00 RO Reserved Boost 1
EN
Reserved
Status
0X02
0X00 RO Reserved Boost 3
Reserved Boost 2
Internal
Enable/
Individual
Channel
Boost
Control
(CH0)
0X03
0X77
RW Reserved Boost Setting
(BC_0)
000 (Min Boost)
001
010
011
100
101
110
111 (Max Boost)
EN (Int.) Reserved
0:Enable
1:Disable
Individual 0X04
Channel
Boost
Control
(CH1, CH2)
0X77
RW Reserved Boost Control
(BC_2)
000 (Min Boost)
001
010
011
100
101
110
111 (Max Boost)
Reserved Boost Control
(BC_1)
000 (Min Boost)
001
010
011
100
101
110
111 (Max Boost)
Signal
0X05
Detect ON
(SD_ON)
0X00 RW Reserved
Bit 1, Bit 0
00
01
10
11
Threshold (mV)
100 (Default)
60
160
120
Signal
0X06
Detect OFF
(SD_OFF)
0X00 RW Reserved
Bit 1, Bit 0
00
01
10
11
Threshold (mV)
30 (Default)
10
60
40
SMBus or 0X07
CMOS
Control for
EN
0X00 RW Reserved
SMBus
Enable
0:Disable
1:enable
Output
Level
0X08
0X78 RW Reserved
Output Level:
00: TBD mVp-p
01: TBD mVp-p
10: TBD mVp-p
11:TBD mVp-p
Reserved
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