DS90CF582 Datasheet, PDF (5/12 Pages) National Semiconductor (TI) – LVDS 24-Bit Color Flat Panel Display (FPD) Link

Switching Characteristics
Over recommended operating supply and temperature ranges unless otherwise specified (Continued)
Symbol
Parameter
Min
Typ
Max
RCOH
RxCLK OUT High Time (Figure 8)
f e 20 MHz
21 5
f e 40 MHz
10 5
RCOL
RxCLK OUT Low Time (Figure 8)
f e 20 MHz
19
f e 40 MHz
6
RSRC
RxOUT Setup to RxCLK OUT (Figure 8)
f e 20 MHz
14
f e 40 MHz
45
RHRC
RxOUT Hold to RxCLK OUT (Figure 8)
f e 20 MHz
16
f e 40 MHz
65
TCCD
RCCD
TPLLS
TxCLK IN to TxCLK OUT Delay 25 C
V_CC e 5 0V (Figure 9)
RxCLK IN to RxCLK OUT Delay 25 C
V_CC e 5 0V (Figure 10)
Transmitter Phase Lock Loop Set (Figure 11)
5
97
76
11 9
10
RPLLS
Receiver Phase Lock Loop Set (Figure 12)
10
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
ms
5
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