DS90CF582 Datasheet, PDF (1/12 Pages) National Semiconductor (TI) – LVDS 24-Bit Color Flat Panel Display (FPD) Link

April 1996
DS90CF581 DS90CF582
LVDS 24-Bit Color Flat Panel Display (FPD) Link
General Description
The DS90CF581 transmitter converts 28 bits of CMOS TTL
data into four LVDS (Low Voltage Differential Signaling)
data streams A phase-locked transmit clock is transmitted
in parallel with the data streams over a fifth LVDS link Every
cycle of the transmit clock 28 bits of input data are sampled
and transmitted The DS90CF582 receiver converts the
LVDS data streams back into 28 bits of CMOS TTL data At
a transmit clock frequency of 40 MHz 24 bits of RGB data
and 4 bits of LCD timing and control data (FPLINE
FPFRAME DRDY CNTL) are transmitted at a rate of
280 Mbps per LVDS data channel Using a 40 MHz clock
the data throughput is 140 Megabytes per second The
chipset is an ideal means to solve EMI and cable size prob-
lems associated with wide high speed TTL interfaces
Features
Y _{Up to 140 Megabyte sec Bandwidth}
Y _{Narrow bus reduces cable size}
Y _{345 mV swing LVDS devices for low EMI}
Y _{Low power CMOS design}
Y _{Power-down mode}
Y _{PLL requires no external components}
Y _{Low profile 56-lead TSSOP package}
Y _{Falling edge data strobe}
Y _{Compatible with TIA EIA-644 LVDS standard}
Block Diagrams
DS90CF581
DS90CF582
Order Number DS90CF581MTD
See NS Package Number MTD56
Application
TL F 12486 – 1
Order Number DS90CF582MTD
See NS Package Number MTD56
TRI-STATE is a registered trademark of National Semiconductor Corporation
C1996 National Semiconductor Corporation TL F 12486
RRD-B30M66 Printed in U S A
TL F 12486 – 2