DS64EV400 Datasheet, PDF (5/18 Pages) National Semiconductor (TI) – Programmable Quad Equalizer

Symbol
Parameter
CML RECEIVER INPUTS (IN_n+, IN_n-)
V_TX
Source Transmit Launch Signal
Level (IN diff)
V_INTRE
V_DDTX
V_ICMDC
Input Threshold Voltage
Supply Voltage of Transmitter to
EQ
Input Common Mode Voltage
R_LI
Differential Input Return Loss
R_IN
Input Resistance
CML OUTPUTS (OUT_n+, OUT_n-)
V_OD
Output Differential Voltage Level
(OUT diff)
V_OCM
Output Common Mode Voltage
t_R, t_F
Transition Time
R_O
Output Resistance
R_LO
Differential Output Return Loss
t_PLHD
t_PHLD
t_CCSK
t_PPSK
Differential Low to High
Propagation Delay
Differential High to Low
Propagation Delay
Inter Pair Channel to Channel
Skew
Part to Part Output Skew
EQUALIZATION
DJ1
Residual Deterministic Jitter
at 10 Gbps
DJ2
Residual Deterministic Jitter
at 6.4 Gbps
DJ3
Residual Deterministic Jitter
at 5 Gbps
DJ4
Residual Deterministic Jitter
at 2.5 Gbps
RJ
Random Jitter
Conditions
Min
AC-Coupled or DC-Coupled
Requirement, Differential
measurement at point A.
Figure 1
Differential measurement at
point B. Figure 1
DC-Coupled Requirement
(Note 10)
DC-Coupled Requirement,
Differential measurement at point
A. Figure 1, (Note 7)
100 MHz – 3.2 GHz, with fixture’s
effect de-embedded
Differential across IN+ and IN-,
Figure 6.
400
1.6
V_DDTX –
0.8
85
Differential measurement with
OUT+ and OUT- terminated by
50Ω to GND, AC-Coupled
Figure 2
Single-ended measurement DC-
Coupled with 50Ω terminations
(Note 7)
20% to 80% of differential output
voltage, measured within 1” from
output pins. Figure 2, (Note 7)
Single ended to V_DD
100 MHz – 1.6 GHz, with fixture’s
effect de-embedded. IN+ = static
high.
Propagation delay measurement
at 50% VO between input to
output, 100 Mbps. Figure 3,
(Note 7)
Difference in 50% crossing
between channels
Difference in 50% crossing
between outputs
500
V_DD– 0.2
20
42
30” of 6 mil microstrip FR4,
EQ Setting 0x06, PRBS-7 (2⁷-1)
pattern. (Note 6)
40” of 6 mil microstrip FR4,
EQ Setting 0x06, PRBS-7 (2⁷-1)
pattern. (Note 5, 6)
40” of 6 mil microstrip FR4,
EQ Setting 0x07, PRBS-7 (2⁷-1)
pattern. (Note 5, 6)
40” of 6 mil microstrip FR4,
EQ Setting 0x07, PRBS-7 (2⁷-1)
pattern. (Note 5, 6)
(Note 7, 8)
Typ
(note 2)
120
10
100
620
50
10
240
240
7
20
0.20
0.17
0.12
0.1
0.5
Max
1600
V_DD
V_DDTX –
0.2
115
725
V_DD– 0.1
60
58
0.26
0.20
0.16
Units
mV_P-P
mV_P-P
V
V
dB
Ω
mV_P-P
V
ps
Ω
dB
ps
ps
ps
ps
UI_P-P
UI_P-P
UI_P-P
UI_P-P
psrms
5
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