|
DS90CR486 Datasheet, PDF (4/15 Pages) National Semiconductor (TI) – 133MHz 48-Bit Channel Lick Deserializer (6.384 Gbps) | |||
|
◁ |
AC Timing Diagrams
FIGURE 1. âWorst Caseâ Test Pattern
Note 7: The worst case test pattern produces a maximum toggling of digital
circuits, LVDS I/O and LVCMOS/LVTTL I/O.
20025210
20025213
FIGURE 2. DS90CR486 LVCMOS/LVTTL Output Load and Transition Times
FIGURE 3. DS90CR486 Setup/Hold and High/Low Times
20025216
www.national.com
4
|
▷ |