DS92LV16 Datasheet, PDF (3/19 Pages) National Semiconductor (TI) – 16-Bit Bus LVDS Serializer/Deserializer - 25 - 80 MHz

Electrical Characteristics (Continued)
Over recommended operating supply and temperature ranges unless otherwise specified.
Symbol
Parameter
Conditions
Pin/Freq.
Min
Output Differential Voltage
V_OD
(DO+) - (DO-)
RL = 100Ω,Figure 17
350
∆V_OD
Output Differential Voltage
Unbalance
V_OS
Offset Voltage
1.05
∆V_OS
Offset Voltage Unbalance
DO = 0V, Din = H,
DO+, DO-
I_OS
Output Short Circuit Current TXPWDN and DEN =
-35
2.4V
TXPWDN or DEN =
I_OZ
Tri-State Output Current
0.8V, DO = 0V OR
-10
VDD
VDD = 0V, DO = 0V
I_OX
Power-Off Output Current
or 3.6V
-10
SER/DES SUPPLY CURRENT (DVDD, PVDD and AVDD pins)
C_L = 15 pF, R_L = 100 f = 80 MHz, PRBS15
Ω
pattern
I_CCT
Total Supply Current (includes
f = 80 MHz, Worse
load current)
C_L = 15 pF, R_L = 100
case pattern
Ω
(Checker-board
pattern)
PWRDN = 0.8V,
I_CCX
Supply Current Powerdown
REN = 0.8V
Serializer Timing Requirements for TCLK
Over recommended operating supply and temperature ranges unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
t_TCP
t_TCIH
t_TCIL
t_CLKT
Transmit Clock Period
Transmit Clock High Time
Transmit Clock Low Time
TCLK Input Transition
Time
12.5
0.4T
0.4T
T
0.5T
0.5T
3
t_JIT
TCLK Input Jitter
Serializer Switching Characteristics
Over recommended operating supply and temperature ranges unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Bus LVDS Low-to-High
t_LLHT
Transition Time
R_L = 100Ω
0.2
Figure 3
t_LHLT
Bus LVDS High-to-Low
Transition Time
C_L=10pF to GND
0.2
t_DIS DIN (0-15) Setup to TCLK
Figure 6
2.4
t_DIH
DIN (0-15) Hold from
TCLK
R_L = 100Ω,
C_L=10pF to GND
0
Typ Max Units
500 550 mV
2
15 mV
1.2 1.25 V
2.7 15 mV
-50 -70 mA
± 1 10 µA
± 1 10 µA
209
mA
225 320 mA
0.35 1.0 mA
Max
40
0.6T
0.6T
6
80
Units
ns
ns
ns
ns
ps
(RMS)
Max
Units
0.4
ns
0.4
ns
ns
ns
3
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