DS92LV16 Datasheet, PDF (16/19 Pages) National Semiconductor (TI) – 16-Bit Bus LVDS Serializer/Deserializer - 25 - 80 MHz

Application Information (Continued)
capacitor is sufficient for these pins. If space is available it
0.01uF may be used in parallel with the 0.1uF capacitor for
additional high frequency filtering.
GROUNDs
The AGND pin should be connected to the signal common in
the cable for the return path of any common-mode current.
Most of the LVDS current will be odd-mode and return within
the interconnect pair. A small amount of current may be
even-mode due to coupled noise, and driver imbalances.
This current should return via a low impedance known path.
A solid ground plane is recommended for both DVDD, PVDD
or AVDD. Using a split plane may have potential problem of
ground loops, or difference in ground potential at various
ground pins of the device.
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