DS92LV16 Datasheet, PDF (11/19 Pages) National Semiconductor (TI) – 16-Bit Bus LVDS Serializer/Deserializer - 25 - 80 MHz

AC Timing Diagrams and Test Circuits (Continued)
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t_RNMI-L is the noise margin on the left of the above figure. It is a negative value to indicate early with respect to ideal.
t_RNMI-R is the noise margin on the right of the above figure. It is a positive value to indicate late with respect to ideal.
FIGURE 16. Deserializer Noise Margin (t_RNMI) and Sampling window
V_OD = (DO⁺)–(DO^−).
Differential output signal is shown as (DO+)–(DO−), device in Data Transfer mode.
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FIGURE 17. V_OD Diagram
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FIGURE 18. Icc vs Freq
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