DS99R103_0710 Datasheet, PDF (21/24 Pages) National Semiconductor (TI) – 3-40MHz DC-Balanced 24-Bit LVDS Serializer and Deserializer

Truth Tables
TPWDNB
(Pin 9)
L
H
H
H
RPWDNB
(Pin 1)
L
H
H
H
TABLE 1. DS99R103 Serializer Truth Table
DEN
(Pin 18)
X
L
H
H
Tx PLL Status
(Internal)
X
X
Not Locked
Locked
LVDS Outputs
(Pins 19 and 20)
Hi Z
Hi Z
Hi Z
Serialized Data with Embedded Clock
TABLE 2. DS99R104 Deserializer Truth Table
REN
(Pin 48)
X
L
Rx PLL Status
(Internal)
X
X
ROUTn and RCLK
(See Pin Diagram)
Hi Z
Hi Z
H
Not Locked
Hi Z
H
Locked
Data and RCLK Active
LOCK
(Pin 17)
Hi Z
L = PLL Unocked;
H = PLL Locked
L
H
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