LM3481 Datasheet, PDF (2/22 Pages) National Semiconductor (TI) – High Efficiency Low-Side N-Channel Controller for Switching Regulators

Connection Diagram
20136502
10-Lead Mini SOIC Package (MSOP-10 Package)
Package Marking and Ordering Information
Order Number
LM3481MM
LM3481MMX
Package Type
MSOP-10
MSOP-10
Package Marking
SJPB
SJPB
Supplied As:
1000 units on Tape and Reel
3500 units on Tape and Reel
Pin Description
Pin Name
I_SEN
UVLO
COMP
FB
AGND
FA/SYNC/SD
PGND
DR
V_CC
V_IN
Pin Number
1
2
3
4
5
6
7
8
9
10
Description
Current sense input pin. Voltage generated across an external sense
resistor is fed into this pin.
Under voltage lockout pin. A resistor divider from V_IN to ground is
connected to the UVLO pin. The ratio of these resistances determine
the input voltage which allows switching and the hysteresis to disable
switching.
Compensation pin. A resistor and capacitor combination connected to
this pin provides compensation for the control loop.
Feedback pin. Inverting input of the error amplifier.
Analog ground pin. Internal bias circuitry reference. Should be
connected to PGND at a single point.
Frequency adjust, synchronization, and shutdown pin. A resistor
connected from this pin to ground sets the oscillator frequency. An
external clock signal at this pin will synchronize the controller to the
frequency of the clock. A high level on this pin for ≥ 30 µs will turn the
device off and the device will then draw 5 µA from the supply typically.
Power ground pin. External power circuitry reference. Should be
connected to AGND at a single point.
Drive pin of the IC. The gate of the external MOSFET should be
connected to this pin.
Driver supply voltage pin. Typically a capacitor is tied from the V_CC pin
to ground.
Power supply input pin.
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