LM3481 Datasheet, PDF (17/22 Pages) National Semiconductor (TI) – High Efficiency Low-Side N-Channel Controller for Switching Regulators

The most important layout rule is to keep the AC current loops
as small as possible. Figure 16 shows the current flow of a
boost converter. The top schematic shows a dotted line which
represents the current flow during on-state and the middle
schematic shows the current flow during off-state. The bottom
schematic shows the currents we refer to as AC currents.
They are the most critical ones since current is changing in
very short time periods. The dotted lined traces of the bottom
schematic are the once to make as short as possible.
The PGND and AGND pins have to be connected to the same
ground very close to the IC. To avoid ground loop currents
attach all the grounds of the system only at one point.
A ceramic input capacitor should be connected as close as
possible to the Vin pin and grounded close to the GND pin.
For a layout example please see Application Note 1204. For
more information about layout in switch mode power supplies
please refer to Application Note 1229.
COMPENSATION
For detailed explanation on how to select the right compen-
sation components to attach to the compensation pin for a
boost topology please see Application Note 1286. When cal-
culating the Error Amplifier DC gain, A_EA, R_OUT = 152 kΩ for
the LM3481.
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FIGURE 16. Current Flow In A Boost Application
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