LM3481 Datasheet, PDF (16/22 Pages) National Semiconductor (TI) – High Efficiency Low-Side N-Channel Controller for Switching Regulators

POWER MOSFET SELECTION
The drive pin, DR, of the LM3481 must be connected to the
gate of an external MOSFET. In a boost topology, the drain
of the external N-Channel MOSFET is connected to the in-
ductor and the source is connected to the ground. The drive
pin voltage, V_DR, depends on the input voltage (see typical
performance characteristics). In most applications, a logic
level MOSFET can be used. For very low input voltages, a
sub-logic level MOSFET should be used.
The selected MOSFET directly controls the efficiency. The
critical parameters for selection of a MOSFET are:
1. Minimum threshold voltage, V_TH(MIN)
2. On-resistance, R_DS(ON)
3. Total gate charge, Q_g
4. Reverse transfer capacitance, C_RSS
5. Maximum drain to source voltage, V_DS(MAX)
The off-state voltage of the MOSFET is approximately equal
to the output voltage. V_DS(MAX) of the MOSFET must be
greater than the output voltage. The power losses in the
MOSFET can be categorized into conduction losses and ac
switching or transition losses. R_DS(ON) is needed to estimate
the conduction losses. The conduction loss, P_COND, is the
I²R loss across the MOSFET. The maximum conduction loss
is given by:
where D_MAX is the maximum duty cycle.
boost application, low values can cause impedance interac-
tions. Therefore a good quality capacitor should be chosen in
the range of 100 µF to 200 µF. If a value lower than 100 µF is
used, then problems with impedance interactions or switching
noise can affect the LM3481. To improve performance, es-
pecially with V_IN below 8V, it is recommended to use a 20Ω
resistor at the input to provide a RC filter. This resistor is
placed in series with the V_IN pin with only a bypass capacitor
attached to the V_IN pin directly (see Figure 15). A 0.1 µF or 1
µF ceramic capacitor is necessary in this configuration. The
bulk input capacitor and inductor will connect on the other side
of the resistor with the input power supply.
20136593
FIGURE 15. Reducing IC Input Noise
OUTPUT CAPACITOR SELECTION
The output capacitor in a boost converter provides all the out-
put current when the inductor is charging. As a result it sees
very large ripple currents. The output capacitor should be ca-
pable of handling the maximum rms current. The rms current
in the output capacitor is:
At high switching frequencies the switching losses may be the
largest portion of the total losses.
The switching losses are very difficult to calculate due to
changing parasitics of a given MOSFET in operation. Often,
the individual MOSFET datasheet does not give enough in-
formation to yield a useful result. The following formulas give
a rough idea how the switching losses are calculated:
INPUT CAPACITOR SELECTION
Due to the presence of an inductor at the input of a boost
converter, the input current waveform is continuous and tri-
angular, as shown in Figure 13. The inductor ensures that the
input capacitor sees fairly low ripple currents. However, as the
input capacitor gets smaller, the input ripple goes up. The rms
current in the input capacitor is given by:
The input capacitor should be capable of handling the rms
current. Although the input capacitor is not as critical in a
Where
and D, the duty cycle is equal to (V_OUT − V_IN)/V_OUT.
The ESR and ESL of the output capacitor directly control the
output ripple. Use capacitors with low ESR and ESL at the
output for high efficiency and low ripple voltage. Surface
mount tantalums, surface mount polymer electrolytic and
polymer tantalum, Sanyo- OSCON, or multi-layer ceramic ca-
pacitors are recommended at the output.
LAYOUT GUIDELINES
Good board layout is critical for switching controllers such as
the LM3481. First the ground plane area must be sufficient for
thermal dissipation purposes and second, appropriate guide-
lines must be followed to reduce the effects of switching noise.
Switch mode converters are very fast switching devices. In
such devices, the rapid increase of input current combined
with the parasitic trace inductance generates unwanted Ldi/
dt noise spikes. The magnitude of this noise tends to increase
as the output current increases. This parasitic spike noise
may turn into electromagnetic interference (EMI), and can al-
so cause problems in device performance. Therefore, care
must be taken in layout to minimize the effect of this switching
noise. The current sensing circuit in current mode devices can
be easily effected by switching noise. This noise can cause
duty cycle jitter which leads to increased spectral noise. Al-
though the LM3481 has 250 ns blanking time at the beginning
of every cycle to ignore this noise, some noise may remain
after the blanking time.
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