COPCH823CJ Datasheet, PDF (15/32 Pages) National Semiconductor (TI) – 8-bit Microcontroller with with Multi-Input Wake Up and Brown Detecter

Modulator Timer
The Modulator Timer contains an 8-bit counter and an 8-bit
autoreload register (MODRL address 0CF Hex) The Modu-
lator Timer has two modes of operation selected by the
control bit MC3 The Modulator Timer Control bits MC1
MC2 and MC3 reside in CNTRL2 Register
MODE 1 MODULATOR
The Modulator is used to generate high frequency pulses on
the modulator output pin (L7) The L7 pin should be config-
ured as an output The number of pulses is determined by
the 8-bit down counter Under software control the modula-
tor input clock can be either CKI or tC The tC clock is de-
rived by dividing down the oscillator clock by a factor of 10
Three control bits (MC1 MC2 and MC3) are used for the
Modulator Timer output control When MC2 e 1 and MC3
e 1 CKI is used as the modulator input clock When MC2
e 0 and MC3 e 1 tC is used as the modulator input clock
The user loads the counter with the desired number of
counts (256 max) and sets MC1 to start the counter The
modulator autoreload register is loaded with n-1 to get n
pulses CKI or tc pulses are routed to the modulator output
(L7) until the counter underflows (Figure 13) Upon under-
flow the hardware resets MC1 and stops the counter The
L7 pin goes low and stays low until the counter is restarted
by the user program The user program has the responsibili-
ty to timeout the low time Unless the number of counts is
changed the user program does not have to load the coun-
ter each time the counter is started The counter can simply
be started by setting the MC1 bit Setting MC1 by software
will load the counter with the value of the autoreload regis-
ter The software can reset MC1 to stop the counter
MODE 2 PWM TIMER
The counter can also be used as a PWM Timer In this
mode an 8-bit register is used to serve as an autoreload
register (MODRL)
a 50% Duty Cycle
When MC1 is 1 and MC2 MC3 are 0 a 50% duty cycle free
running signal is generated on the L7 output pin (Figure 14)
The L7 pin must be configured as an output pin In this
mode the 8-bit counter is clocked by tC Setting the MC1
control bit by software loads the counter with the value of
the autoreload register and starts the counter The counter
underflow toggles the (L7) output pin The 50% duty cycle
signal will be continuously generated until MC1 is reset by
the user program
b Variable Duty Cycle
When MC3 e 0 and MC2 e 1 a variable duty cycle PWM
signal is generated on the L7 output pin The counter is
clocked by tC In this mode the 16-bit timer T1 along with
the 8-bit down counter are used to generate a variable duty
cycle PWM signal The timer T1 underflow sets MC1 which
starts the down counter and it also sets L7 high (L7 should
be configured as an output) When the counter underflows
the MC1 control bit is reset and the L7 output will go low
until the next timer T1 underflow Therefore the width of the
output pulse is controlled by the 8-bit counter and the pulse
duration is controlled by the 16-bit timer T1 (Figure 15) Tim-
er T1 must be configured in ‘‘PWM Mode Toggle TIO Out’’
(CNTRL1 Bits 7 6 5 e 101)
Table VII shows the different operation modes for the Mod-
ulator Timer
TABLE VII Modulator Timer Modes
Control Bits in
CNTRL2(00CC)
MC3 MC2 MC1
Operation Mode
L7 Function
0
0
0 Normal I O
0
0
1 50% Duty Cycle Mode (Clocked
by tc)
0
1
X Variable Duty Cycle Mode
(Clocked by tc) Using Timer 1
Underflow
1
0
X Modulator Mode (Clocked by tc)
1
1
X Modulator Mode (Clocked by
CKI)
Note MC1 MC2 and MC3 control bits are cleared upon reset
Internal Data Bus
FIGURE 13 Mode 1 Modulator Block Diagram Output Waveform
15
TL DD 11208 – 16
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