COPCH823CJ Datasheet, PDF (12/32 Pages) National Semiconductor (TI) – 8-bit Microcontroller with with Multi-Input Wake Up and Brown Detecter

Functional Description (Continued)
The user must set the BUSY flag immediately upon entering
the Slave mode This will ensure that all data bits sent by
the Master will be shifted properly After eight clock pulses
the BUSY flag will be cleared and the sequence may be
repeated
TABLE IV
G4
G5
G4
Config Config
Fun
Bit
Bit
G5 G6
Fun Fun
Operation
1
1
SO
Int SK SI MICROWIRE Master
0
1 TRI-STATE Int SK SI MICROWIRE Master
1
0
SO
Ext SK SI MICROWIRE Slave
0
0 TRI-STATE Ext SK SI MICROWIRE Slave
Timer Counter
The device has a powerful 16-bit timer with an associated
16-bit register enabling it to perform extensive timer func-
tions The timer T1 and its register R1 are each organized
as two 8-bit read write registers Control bits in the register
CNTRL allow the timer to be started and stopped under
software control The timer-register pair can be operated in
one of three possible modes Table V details various timer
operating modes and their requisite control settings
MODE 1 TIMER WITH AUTO-LOAD REGISTER
In this mode of operation the timer T1 counts down at the
instruction cycle rate Upon underflow the value in the regis-
ter R1 gets automatically reloaded into the timer which con-
tinues to count down The timer underflow can be pro-
grammed to interrupt the microcontroller A bit in the control
register CNTRL enables the TIO (G3) pin to toggle upon
timer underflows This allows the generation of square-wave
outputs or pulse width modulated outputs under software
control (Figure 8)
MODE 2 EXTERNAL COUNTER
In this mode the timer T1 becomes a 16-bit external event
counter The counter counts down upon an edge on the TIO
pin Control bits in the register CNTRL program the counter
to decrement either on a positive edge or on a negative
edge Upon underflow the contents of the register R1 are
automatically copied into the counter The underflow can
also be programmed to generate an interrupt (Figure 9)
CNTRL
Bits
765
000
001
010
011
100
101
110
111
TL DD 11208 – 24
FIGURE 8 Timer Counter Auto
Reload Mode Block Diagram
TABLE V Timer Operating Modes
Operation Mode
External Counter w Auto-Load Reg
External Counter w Auto-Load Reg
Not Allowed
Not Allowed
Timer w Auto-Load Reg
Timer w Auto-Load Reg Toggle TIO Out
Timer w Capture Register
Timer w Capture Register
T Interrupt
Timer Underflow
Timer Underflow
Not Allowed
Not Allowed
Timer Underflow
Timer Underflow
TIO Pos Edge
TIO Neg Edge
Timer
Counts
On
TIO Pos Edge
TIO Neg Edge
Not Allowed
Not Allowed
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FIGURE 9 Timer in External Event Counter Mode
12
TL DD 11208 – 29