DS10CP154_1 Datasheet, PDF (12/18 Pages) National Semiconductor (TI) – 1.5 Gbps 4X4 LVDS Crosspoint Switch

SWITCH CONFIGURATION REGISTER
The Switch Configuration register is utilized to configure the switch. The following two tables show the Switch Configuration Register
mapping and associated truth table.
Bit
D[1:0]
D[3:2]
D[5:4]
D[7:6]
Default
00
00
00
00
Bit Name
Input Select 0
Input Select 1
Input Select 2
Input Select 3
Access
R/W
R/W
R/W
R/W
Description
Selects which input is routed to the OUT0.
Selects which input is routed to the OUT1.
Selects which input is routed to the OUT2.
Selects which input is routed to the OUT3.
TABLE 7. Switch Configuration Register Truth Table
D1
D0
0
0
0
1
1
0
1
1
Input Routed to the OUT0
IN0
IN1
IN2
IN3
The truth tables for the OUT1, OUT2, and OUT3 outputs are identical to this table.
The switch configuration logic has a SmartPWDN circuitry which automatically optimizes the device's power consumption based
on the switch configuration (i.e. It places unused I/O blocks and other unused circuitry in the power down state).
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