DS10CP154_1 Datasheet, PDF (10/18 Pages) National Semiconductor (TI) – 1.5 Gbps 4X4 LVDS Crosspoint Switch

TABLE 3. Input Select Pins Configuration for the Output OUT2
S21
S20
INPUT SELECTED
0
0
IN0
0
1
IN1
1
0
IN2
1
1
IN3
TABLE 4. Input Select Pins Configuration for the Output OUT3
S31
S30
INPUT SELECTED
0
0
IN0
0
1
IN1
1
0
IN2
1
1
IN3
DS10CP154 OPERATION IN THE SMBUS MODE
The DS10CP154 operates as a slave on the System Man-
agement Bus (SMBus) when the EN_smb pin is set to a high
(1). Under these conditions, the SCL pin is a clock input while
the SDA pin is a serial data input pin.
slave address are hard wired inside the DS10CP154 and are
“101”. The four least significant bits of the address are as-
signed to pins ADDR3-ADDR0 and are set by connecting
these pins to GND for a low (0) or to VCC for a high (1). The
complete slave address is shown in the following table:
Device Address
Based on the SMBus 2.0 specification, the DS10CP154 has
a 7-bit slave address. The three most significant bits of the
TABLE 5. DS10CP154 Slave Address
1
0
MSB
1
ADDR3
ADDR2
ADDR1
ADDR0
LSB
This slave address configuration allows up to sixteen
DS10CP154 devices on a single SMBus bus.
Transfer of Data via the SMBus
During normal operation the data on SDA must be stable dur-
ing the time when SCK is high.
There are three unique states for the SMBus:
START: A HIGH to LOW transition on SDA while SCK is high
indicates a message START condition.
STOP: A LOW to HIGH transition on SDA while SCK is high
indicates a message STOP condition.
IDLE: If SCK and SDA are both high for a time exceeding
tBUF from the last detected STOP condition or if they are high
for a total exceeding the maximum specification for tHIGH
then the bus will transfer to the IDLE state.
SMBus Transactions
A transaction begins with the host placing the DS10CP154
SMBus into the START condition, then a byte (8 bits) is trans-
ferred, MSB first, followed by a ninth ACK bit. ACK bits are ‘0’
to signify an ACK, or ‘1’ to signify NACK, after this the host
holds the SCL line low, and waits for the receiver to raise the
SDA line as an ACKnowledge that the byte has been re-
ceived.
Writing to a Register
To write a data value to a register in the DS10CP154, the host
writes three bytes to the DS10CP154. The first byte is the
device address—the device address is a 7 bit value, and if
writing to the DS10CP154 the last bit (LSB) is set to ‘0’ to
signify that the operation is a write. The second byte written
is the register address, and the third byte written is the data
to be written into the addressed register. If additional data
writes are performed, the register address is automatically in-
cremented. At the end of the write cycle the host places the
bus in the STOP state.
Reading From a Register
To read the data value from a register, first the host writes the
device address with the LSB set to a ‘0’ denoting a write, then
the register address is written to the device. The host then
reasserts the START condition, and writes the device address
once again, but this time with the LSB set to a ‘1’ denoting a
read, and following this the DS10CP154 will drive the SDA
line with the data from the addressed register. The host indi-
cates that it has finished reading the data by asserting a ‘1’
for the ACK bit. After reading the last byte, the host will assert
a ‘0’ for NACK to indicate to the DS10CP154 that it does not
require any more data.
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