DS90UR908Q Datasheet, PDF (1/30 Pages) National Semiconductor (TI) – 5 - 65 MHz 24-bit Color FPD-Link II to FPD-Link Converter

DS90UR908Q
October 20, 2010
5 - 65 MHz 24-bit Color FPD-Link II to FPD-Link Converter
General Description
The DS90UR908Q converts FPD-Link II to FPD Link. It trans-
lates a high-speed serialized interface with an embedded
clock over a single pair (FPD-Link II) to four LVDS data/control
streams and one LVDS clock pair (FPD-Link). This serial bus
scheme greatly eases system design by eliminating skew
problems between clock and data, reduces the number of
connector pins, reduces the interconnect size, weight, and
cost, and overall eases PCB layout. In addition, internal DC
balanced decoding is used to support AC-coupled intercon-
nects.
The DS90UR908Q converter recovers the data (RGB) and
control signals and extracts the clock from a serial stream
(FPD-Link II). It is able to lock to the incoming data stream
without the use of a training sequence or special SYNC pat-
terns and does not require a reference clock. A link status
(LOCK) output signal is provided.
Adjustable input equalization of the serial input stream pro-
vides compensation for transmission medium losses of the
cable and reduces the medium-induced deterministic jitter.
EMI is minimized by the use of low voltage differential signal-
ing, output voltage level select feature, and additional output
spread spectrum generation.
With fewer wires to the physical interface of the display, FPD-
Link output with LVDS technology is ideal for high speed, low
power and low EMI data transfer.
The DS90UR908Q is offered in a 48-pin LLP package and is
specified over the automotive AEC-Q100 grade 2 tempera-
ture range of -40˚C to +105˚C.
Features
■ ^{5 – 65 MHz support (140 Mbps to 1.82 Gbps Serial Link)}
■ ^{5-channel (4 data + 1 clock) FPD-Link driver outputs}
■ ^{AC Coupled STP Interconnect up to 10 meters in length}
■ ^{Integrated input termination}
■ ^{@ Speed link BIST Mode and reporting pin}
■ ^{Optional I2C compatible Serial Control Bus}
■ ^{RGB888 + VS, HS, DE support}
■ ^{Power down mode minimizes power dissipation}
■ ^{FAST random data lock; no reference clock required}
■ ^{Adjustable input receive equalization}
■ ^{LOCK (real time link status) reporting pin}
■ ^{Low EMI FPD-Link output}
■ ^{SSCG option for lower EMI}
■ ^{1.8V or 3.3V compatible I/O interface}
■ ^{Automotive grade product: AEC-Q100 Grade 2 qualified}
■ ^{>8kV HBM ESD tolerance}
■ ^{Backward compatible mode for operation with older}
generation devices
Applications
■ ^{Automotive Display for Navigation}
■ ^{Automotive Display for Entertainment}
Applications Diagram
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