DS50EV401 Datasheet, PDF (1/14 Pages) National Semiconductor (TI) – 2.5 Gbps / 5.0 Gbps / 8.0 Gbps Quad PCI Express Cable and Backplane Equalizer

February 7, 2008
DS50EV401
2.5 Gbps / 5.0 Gbps / 8.0 Gbps Quad PCI Express Cable and
Backplane Equalizer
General Description
The DS50EV401 is a low power, programmable equalizer
specifically designed for PCI Express applications. The de-
vice provides 2 equalization settings to reduce inter-symbol
interference (ISI) induced by a variety of interconnect media.
One setting is optimized for PCIe Gen1 and Gen2 applica-
tions; the other is optimized for future Gen3 data rates. In all
modes, the equalizer can operate, error free, with an input eye
that is completely closed by interconnect ISI. A single pin,
MODE, allows the user to change between these two modes.
The DS50EV401 enables PCI Express compatible link ex-
tension by supporting transmit electrical idle, and Beacon
signal pass through on a per lane basis. Current-mode logic
(CML) is used on both input and output terminals, which pro-
vide constant 50 ohm single-ended impedance to AC ground.
Differential signaling is implemented through out the entire
signal path to minimize supply induced jitter. The DS50EV401
is available in a 7mm x 7mm 48-pin leadless LLP package,
and is powered from a single power supply of either 3.3 or
2.5V.
Features
■ ^{PCI Express compatible link extension}
■ ^{Automatic power management on an individual lane basis}
■ ^{Data rate optimized equalization}
■ ^{Operates over 7 meter of 24 AWG PCI Express Cables up}
to 8 Gbps
■ ^{0.18 UI of residual deterministic jitter at 8 Gbps with 30” of}
FR4
■ ^{0.18 UI of residual deterministic jitter at 5 Gbps with 40” of}
FR4
■ ^{0.16 UI of residual deterministic jitter at 2.5 Gbps with 40”}
of FR4
■ ^{8 kV HBM ESD}
■ ^{-40 to 85°C operating temperature range}
■ ^{7 mm x 7 mm 48-pin leadless LLP package}
■ ^{Single power supply of either 3.3V or 2.5V}
■ ^{Low power (typically 95 mW per channel at 2.5V VCC)}
Simplified Application Diagram
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