SM5903CF Datasheet, PDF (8/31 Pages) Nippon Precision Circuits Inc – compression and non compression type anti-shock memory controller

SM5903CF
Serial output (ZSRDATA, ZLRCK, ZSCK pins)
Parameter
Symbol Condition
Rating
Unit
Min
Typ
Max
ZSCK pulsewidth
tSCOW
15 pF load
1/96fs
ZSCK pulse cycle
tSCOY
15 pF load
1/48fs
ZSRDATA and ZLRCK output delay time
tDHL
15 pF load
0
60
ns
tDLH
15 pF load
0
60
ns
ZSCK
ZSRDATA
ZLRCK
t t SCOW
SCOW
t SCOY
t DHL
0.5VDD
0.5VDD
t DLH
DRAM access timing (NRAS, NCAS, NCAS2, NWE, A0 to A10, D0 to D3)
Parameter
Symbol
Condition
Min
NRAS pulsewidth
tRASL
15 pF load
tRASH
15 pF load
3
NRAS falling edge to NCAS falling edge
tRCD
15 pF load
NCAS pulsewidth
tCASH
15 pF load
5
tCASL
15 pF load
NRAS
Setup time
tRADS
15 pF load
falling edge to address
Hold time
tRADH
15 pF load
NCAS
Setup time
tCADS
15 pF load
falling edge to address
Hold time
tCADH
15 pF load
NCAS
Setup time
tCWDS
15 pF load
falling edge to data write
Hold time
tCWDH
15 pF load
NCAS
Input setup
tCRDS
40
rising edge to data read
Input hold
tCRDH
0
NWE pulsewidth
tWEL
15 pF load
NWE falling edge to NCAS falling edge
tWCS
15 pF load
Non compression
Refresh cycle
1M 6-bit compression
(fs = 44.1 kHz playback)
DRAM 5-bit compression
tREF
× 1 4-bit compression
Memory system ON
Non compression
Decode sequence operation
4M 6-bit compression
(RDEN=H)
DRAM 5-bit compression
× 1 or × 2 4-bit compression
Non compression
16M 6-bit compression
DRAM 5-bit compression
× 1 4-bit compression
Note. tCY is the system clock (CLK) input (384fs) cycle time. tCY = 59 ns when fs = 44.1 kHz
Rating
Typ
5
2
3
1
1
1
5
3
3
6
3
Unit
Max
tCY(note)
tCY
tCY
tCY
tCY
tCY
tCY
tCY
tCY
tCY
tCY
ns
ns
tCY
tCY
1.5
ms
3.7
ms
4.4
ms
5.5
ms
3.0
ms
7.3
ms
8.8
ms
10.9
ms
5.9
ms
14.6
ms
17.5
ms
21.8
ms
NIPPON PRECISION CIRCUITS-8