SM5859AF Datasheet, PDF (6/33 Pages) Nippon Precision Circuits Inc – compression and non compression type antishock memory controller

SM5859AF
AC characteristics
Standard voltage: VDD = 4.5 to 5.5 V, VSS = 0 V, Ta = -40 to 85 °C
Low-voltage: VDD = 2.7 to 4.5 V, VSS = 0 V, Ta = -20 to 70 °C
(*) Typical values are for fs = 44.1 kHz
System clock (CLK pin)
Parameter
Clock pulsewidth (HIGH level)
Clock pulsewidth (LOW level)
Clock pulse cycle
System clock input
Symbol
tCWH
tCWL
tCY
Condition
System clock
384fs
Rating
Unit
Min
Typ
Max
26
29.5
125
ns
26
29.5
125
ns
56
59
250
ns
CLK
t CWH
t CY
t CWL
0.5VDD
Serial input (YSRDATA, YLRCK, YSCK pins)
Parameter
Symbol
Rating
Unit
Condition
YSCK pulsewidth (HIGH level)
YSCK pulsewidth (LOW level)
YSCK pulse cycle
YSRDATA setup time
YSRDATA hold time
Last YSCK rising edge to YLRCK edge
YLRCK edge to first YSCK rising edge
Min
Typ
Max
tBCWH
75
ns
tBCWL
75
ns
tBCY
150
ns
tDS
40
ns
tDH
40
ns
tBL
40
ns
tLB
40
ns
0
2fs
Memory system ON
YLRCK pulse frequency
(MSON=H)
See note below.
fs
fs
Memory system OFF
(MSON=L)
Note. When the memory system is OFF (through mode), the input data rate is synchronized to the system clock input (384fs), so input
data needs to be at 1/384 of this frequency. But, this IC can tolerate a certain amount of jitter. For details, refer to Through-mode
operation.
YSCK
YSRDATA
YLRCK
t BCWH
t BCY
t BCWL
t DS
t DH
t BL
t LB
0.5VDD
0.5VDD
0.5VDD
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