SM5859AF Datasheet, PDF (18/33 Pages) Nippon Precision Circuits Inc – compression and non compression type antishock memory controller

SM5859AF
Flag
name
MSEMP
OVFL
ENCOD
DECOD
Read
method
READ
91H
bit 7
READ
91H
bit 6
Meaning
Set
Reset
Meaning
Set
Reset
READ
91H
bit 5
Meaning
Set
Reset
READ
91H
bit 4
Meaning
Set
Reset
- Indicates that the valid data residual has become 0
- When the VWA (final valid data's next address)
= RA (address from which the next read would take place)
- Whenever the above does not apply
- Indicates a write to external DRAM overflow state
- When the write address (WA) exceeds the read address (RA).
(Note: This flag is not set when WA=RA through an address initialize or reset operation.)
- When the read address (RA) is advanced by the decode sequence
- When a read address clear (MSRACL) or write address clear (MSWACL) command is issued
- After external reset
- Indicates that the encode sequence (input data entry, encoding, DRAM write) is operating
- By the 80H command when MSWREN=1
- When conforming data is detected during compare-connect operation
- When the connect has been performed after receiving a direct connect command
- When the FLAG6 flag=1 (above)
- When the OVFL flag=1 (above)
- By the 80H command when MSWREN=0
- By the 80H command when MSDCN1=1 or MSDCN2=1 (compare-connect start command)
- By the 80H command when MSON=0
- After external reset
Note. Reset conditions have priority over set conditions. For example, if the 80H command has
MSWREN=1 and MSDCN1=1, the ENCOD flag is reset and compare-connect operation starts.
- Indicates that the decode sequence (read from DRAM, decoding,
attenuation, data output) is operating
- By a new 80H command when MSRDEN=1 and the MSEMP flag=0 (above)
- Whenever the above does not apply
NIPPON PRECISION CIRCUITS-18