SM5902AF Datasheet, PDF (30/40 Pages) Nippon Precision Circuits Inc – compression and non compression type shock-proof memory controller

SM5902AF
Soft mute
Soft mute operation is controlled by the SOFT flag
using a built-in attenuation counter.
Mute is ON when the SOFT flag is 1. When ON, the
attenuation counter output decrement by 1 step at a
time, thereby reducing the gain. Complete mute
takes 1024/fs (or approximately 23.2 ms for fs =
44.1 kHz).
Conversely, mute is released when the SOFT flag
is 0. In this case, the attenuation counter instanta-
neously increases. The attenuation register takes
on the value when the ATT flag was 1. If the ATT
flag was 0, the new set value is 256 (0 dB).
SOFT
Attenation level
or full scale
(Gain)
−∞
256 step
/ 1024TS
Fig 4. Soft mute operation example
Force mute
Serial output data is muted by setting the YDMUTE
pin input HIGH or by setting the MUTE flag to 1.
Mute starts and finishes on the leading left-channel
bit.
When MSON is HIGH and valid data is empty
(MSEMP=H), the output is automatically forced into
the mute state.
12-bit comparison connection
When the CMP12 flag is set to 1, the least signifi-
cant 4 bits of the 16-bit comparison connection
input data are discarded and comparison connec-
tion is performed using the remaining 12 bits.
Note that if the CMP12 flag is set to 1 during a com-
parison connection operation, only the most signifi-
cant 12 bits are used for comparison connection
from that point on.
NIPPON PRECISION CIRCUITS-30