SM5166AV Datasheet, PDF (2/11 Pages) Nippon Precision Circuits Inc – PLL Synthesizer IC

BLOCK DIAGRAM
SM5166AV
XIN
XOUT
VDD2
DATA
CLK
LE
OPR
VDD1
FIN
1/8
PRESCALER
VDD2
AREA
LATCH
SELECTOR
VDD1
AREA
13 BIT
R COUNTER
LEVEL
SHIFTER
VDD1
AREA
TEST
LD
14 BIT LATCH
16 BIT
SHIFT REGISTER
PHASE
DETECTOR
16 BIT LATCH
LOCK
DETECTOR
BOOSTER
S. G.
DB
CHARGE
PUMP
DO
16 BIT
N COUNTER
LEVEL
SHIFTER
LEVEL
SHIFTER
WINDOW
GENERATOR
VSS
PIN DESCRIPTION
Number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Name
XIN
XOUT
VDD2
DB
DO
VSS
FIN
VDD1
NC
LD
CLK
DATA
LE
OPR
NC
TEST
I/O
Description
I Reference frequency divider crystal (oscillator) connection pins. Alternatively, an external clock input can
be connected to XIN. The clock is also output on XOUT.
O _{Feedback resistor built-in for AC-coupled inputs.}
– Phase detector, charge pump and boost-up signal 3 V supply
O boost-up signal output for faster locking
Phase detector output pin.
O Built-in charge pump and tristate output means that this output can be connected to a low-pass filter.
The output polarity is preset for connection to a passive filter.
– Ground pin
I
Operating frequency divider input pin.
Feedback resistor built-in for AC-coupled inputs.
– Reference frequency and operating frequency prescaler and counter 1 V supply
– No connection
Unlock signal output pin. (Unlocked when HIGH)
O The function of LD can be turned OFF using the LD input control bit (LD should be tied LOW when not
used).
I Control data clock input pin
I Control data input pin
I Control data latch enable signal input pin
I
Power-save control pin.
Start when HIGH, standby mode when LOW.
– No connection
I
Test pin.
Pull-down resistor built-in. Leave open or connect to ground for normal operation.
NIPPON PRECISION CIRCUITS—2