UPD784224 Datasheet, PDF (42/92 Pages) NEC – 16/8-BIT SINGLE-CHIP MICROCONTROLLERS

µPD784224, 784225, 784224Y, 784225Y
7.7.2 Clocked serial interface (CSI)
In this mode, the master device starts transfer by making the serial clock active and communicates 1-byte data
in synchronization with this clock.
(1) 3-wire serial I/O mode
This mode is to communicate with devices having the conventional clocked serial interface.
Basically, communication is established in this mode with three lines: one serial clock (SCK0) and two serial
data (SI0 and SO0) lines.
Generally, a handshake line is necessary to check the reception status.
Figure 7-12. Block Diagram in 3-Wise Serial I/O Mode
SI0
SO0
SCK0
Internal bus
8
Direction controller
8
Serial I/O shift register 0
(SIO0)
Serial clock
counter
Serial clock
controller
Interrupt
generator
Selector
INTCSI0
TO2
fXX/8
fXX/16
(2) I²C (Inter IC) bus mode (supporting multi-master) (µPD784225Y Subseries only)
This mode is to communicate with devices conforming to the I²C bus format.
This mode is to transfer 8-bit data with two or more devices by using two lines: serial clock (SCL0) and serial
data bus (SDA0).
During transfer, a “start condition”, “data”, and “stop condition” can be output onto the serial data bus. During
reception, these data can be automatically detected by hardware.
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Data Sheet U12376EJ1V0DS00